1. Field of the Invention
The invention relates to a current output digital-to-analog conversion circuit. The invention particularly relates to a digital-to-analog conversion circuit that can speed up the transition rate of the output voltage while keeping the output voltage constant.
2. Description of the Prior Art
FIG. 6 shows a conventional current output digital-to-analog conversion circuit. The conventional current output digital-to-analog conversion circuit comprises a digital-to-analog conversion circuit 1 on the chip of a semiconductor integrated circuit, a current supplying portion 2 that changes a current value according to digital data applied to switch 8 (8-1, 8-2, . . . 8-m, m is a positive integer), a current source 3 (3-1, 3-2, . . . 3-m) producing a current value controlled by a bias voltage applied to a bias voltage input terminal (VG) 4, an analog output terminal 5 where the analog voltage Vout is output from the digital-to-analog conversion circuit 1, a current input terminal 6 of the current supplying portion 2 where a current flows via a resistor 9, a voltage source 7, an output resistor 9 through which current flows through the current source according to the on/off state of a switch 8, and a ground 15.
The operation of the conventional digital-to-analog conversion circuit of FIG. 6 is as explained below. Input digital data turns on or off corresponding switch 8 (8-1, 8-2, . . . 8-m). The current source 3 (3-1, 3-2, . . . 3-m) connected to the voltage supply 7 via the switches 8, supplies the current through the output resistor 9. The voltage drop of the output resistor 9 is supplied to the analog output terminal 5 as an analog voltage. When many of the current sources 3 are connected to the voltage source Vdd by many of the switches 8, a large current flows through the output resistor 9. The voltage drop of the output resistor 9 becomes large and the voltage at the analog output terminal 5 falls.
On the other hand, when only a few of the current sources 3 are connected to the voltage source Vdd by a few of the switches 8, a small current flows through the output resistor 9. The voltage drop of the output resistor 9 becomes small and the voltage at the analog output terminal 5 rises. In this way, in the digital-to-analog conversion circuit 1, the number of current sources 3 selected by the switches 8 according to the value of the digital data input, whereby an analog voltage corresponding to the digital data is obtained at the analog output terminal 5.
Up to the present, since a digital-to-analog converter has been constructed in such a manner, when the transition rate of the output of the digital-to-analog conversion circuit is not sufficient, in other words, when the response rate for a voltage change is slow, the bias voltage of the current source transistor is usually changed to obtain a larger full scale current. In this case, however, as shown in FIG. 8, although the transition rate of the output of the digital-to-analog conversion circuit becomes faster, such as moving from curve "a" to curve "e", when the bias voltage is set higher such as from VG1 to VG5, the output voltage has fallen such as from V1 to V5. This result occurs because, although the output current becomes large, the output resistance is not changed.
This phenomenon is explained in more detail below. FIG. 7 shows a general transistor characteristic (voltage between drain sources versus drain current) of the CMOS transistor. FIG. 8 shows the relation between the output voltage Vout versus the output transition time when the bias voltage (gate voltage) of a CMOS transistor is increased from V1 to V5 such as VG1&lt;VG2&lt;VG3&lt;VG4&lt;VG5. As shown in FIG. 7, when the gate voltage VG of the transistor is increased such as VG1&lt;VG2&lt;VG3&lt;VG4 &lt;VG5, the drain current flowing through the drain of the MOS transistor also increases according to the increase of the gate voltage. As understood from FIG. 8, since the current which flows through the output resistor 9 increases when the bias voltage of the transistor of the current source 3 becomes higher, the output transition time becomes shorter. But the output voltage Vout falls since the voltage drop of the output resistor 9 becomes larger. For example, when the gate voltage changes from zero to VG1, the output voltage Vout transfers from VDD to the voltage V1 on the straight line p with the transition slope "a". In the same way, for VG2, the output voltage Vout changes from VDD to the voltage V2 on the straight line q with the transition slope "b". For VG3, from VDD to V3 on the straight line r with the transition slope "c", for VG4, from VDD to V4 on the straight line s with the transition slope "d", and for VG5, from VDD to V51 on the straight line t with the transition slope "e".
Usually the output voltage amplitude (power supply voltage VDD-output voltage) is prescribed by a system or an application, and therefore, it can not be changed. Accordingly, if the transition rate of the digital-to-analog conversion circuit must be made faster by increasing the output current, it is necessary to make the resistance of the resistor small so that the output voltage amplitude does not change. But if the digital-to-analog conversion circuit is produced in a mass production process, significant labor is necessary to change the resistance of a large number of resistors. There has been a problem that it is necessary to redesign the chip since it is not realistic to change such a large number of resistors.
Further, if the same chip is used for a different output voltage which is prescribed for every system and application, it is necessary to increase (or decrease) the resistances of the external resistors or to increase (or decrease) the output current for every digital-to-analog conversion circuit. When the output current increases, it is not necessary to change the resistance of the external resistor. However, there is a problem because the power consumption of the chip increases.